The Alder Lake-Ns are the low-power, low-price variant that Intel has developed to extend its new processing platform. And it is that the chip giant wants to position Alder Lake in any market segment, from large servers to small integrated ones.
To the «S» series for desktops and the «H, P and U» for laptops, 2-in-1s and convertibles, Intel now adds the Alder Lake-N that will be marketed under the Pentium and Celeron brands for consumers. entry-level personal computers. They will have eight processing cores, two high-performance ‘Golden Cove’ and six high-efficiency ‘Gracemont’, continuing the hybrid design that Intel has opted for for its new architecture in the purest style of the big.LITTLE that ARM uses for mobile devices.
Although this will be the general rule for the «N» series, the Japanese outlet Coelacanth Dream has found other models in a repository of Intel drivers for Linux that will reduce consumption and price even more thanks to the removing cores for performance. A return of Atom models that will feature two quad-core clusters, with 2MB of L2 cache each and a shared third-level cache in an undisclosed size.
That is, these SoCs would use eight high efficiency E cores and none of P performance. They will have a next-generation integrated graphics with 32 execution units, the same one that mounts the Core i5-12600. Intel puts its overall performance in the range of what older Skylake models offered, though some external tests say it will be lower.
We do not know if Intel will be able to offer in this series the new technologies and standards implemented for the platform, such as LPDDR5 memories, the PCIe 5.0 interface, Wi-Fi 6E wireless connectivity or the new USB4 connection port.
Why these Alder Lake-N? Probably for small integrated and embedded in professional applications, while in the consumer market we could see them in Chromebooks to compete in low consumption and price with the Current entry-level models using ARM.
It is clear that Intel has made the right choice in its commitment to a hybrid architecture that offers great flexibility when developing different models, simply adding/decreasing clusters or using cores to increase performance or efficiency.